Deep n-well structures are useful as a means to provide improved device isolation and reduce substrate leakage of devices such as NMOS. They are commonly used in integrated circuits with devices designed for analog or high voltage applications. The depth of a deep n-well, may for example range between 5-15 μm. Such a depth, may be suitable for devices operating from about 10-100 V. Forming a deep device well having other depths may also be useful depending on the device type and desired device performance.
FIG. 1a illustrates a known method for forming a deep n-well 120 in a p-type silicon substrate 100. In this method, a masking layer 130 comprising a pad oxide and an overlying nitride layer are funned on a substrate 100. The masking layer is selected so that dopants do not penetrate through during a subsequent deep n-well implant process. An opening located over the desired deep n-well region is formed in the masking layer 130 by forming a photoresist pattern (not shown) over the masking layer and etching through exposed portions of the masking layer. N-type dopants 150 such as phosphorus or arsenic are then injected into the substrate through the opening in the masking layer 130 in deep n-well implant process 150. In order to place n-type dopants at a sufficient depth within the substrate, the deep n-well implant process typically comprises one or more high energy implant steps. This is followed by a high temperature drive-in process in an oxidizing ambient. The drive-in process is configured to effectuate the diffusion of deep n-well dopants to the desired depth and as such requires a high thermal cycle. It typically requires a processing time of 30 hours or more to form the deep n-well at around 10 um. A drive-in oxide 140 is grown over the deep n-well region during the drive-in process.
FIG. 1b shows the semiconductor structure of FIG. 1a after the drive-in oxide 140 is removed. Consumption of the silicon substrate during the drive-in oxide formation results in the substrate surface overlying the deep n-well being recessed with respect to the substrate surface of adjacent regions. Since the drive-in process is lengthy, the recess can be of significant depth and as such be an undesirable artifact. For example, the recess 160 can cause depth of focus problems during photolithography exposure, and increase the complexity of shallow trench isolation (STI) formation since STI fill material located in substrate trenches of different heights need to be recessed.
In addition to the above, the long high temperature drive-in process in the above described in the known method can also lead to problems like wafer warpage. Therefore, it is desirable to provide an improved method for forming deep n-well structures.